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communication semiconductors cmx625 data bulletin isdn ta pots interface iom is a registered trademark of seimens ag 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480223.001 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. advance information features applications ? spm and ringing voltage generators ? integrated dtmf decoder/encoder ? v.23/bell 202 fsk/tone generator ? selectable a-law/-law pcm codec ? iom-2 interface terminal mode and non- terminal mode (line card mode) ? isdn ntus with analog ports ? isdn line cards ? wireless local loop termination cards ? isdn terminals with additional pots ports ? pc based isdn cards with telephone ports ? billing/spm systems rx- rx+ rxampout tx uart status & irq status & irq dtmf tone decoder bus fsc dcl du dd irq iom -2 serial bus interface ? fsk / tones tx registers setup & mode registers status register pcm codec registers rom tone encoder tone / fsk encoder tx signal control ring pcm adc a-law / -law tonefsk vbias dac out txout txout tx- sa2 sa1 sa0 te/nte ds interrupt generator pcm dac a-law / -law tx output buffer enable rx input amplifier enable analog loopback digital loopback spm generator spm reset iom is a registered trademark of siemens ag ? v dd v bias v ss the cmx625 is an integrated telecom tone generator, dtmf encoder/decoder and pcm codec-filter designed for isdn interfaces, wireless local loop and other digitized speech systems. the tone generator covers a wide range of pre-programmed tones used in analog phone systems. three outputs are provided: ringing signals, in-band tones or fsk data, and 12khz/16khz subscriber metering pulses. the pcm codec-filter performs voice digitization and reconstruction and incorporates band limiting and smoothing with selectable a-law or -law companding following ccitt recommendation g.711. the dtmf decoder presents the serial bus interface with the dtmf dialing information received from the telephone user and the tone generator sends the appropriate dtmf tones to this pots interface. other tone standards supported are: fax and modem ?answer? and ?originate?, itu (ccitt) ?r1? and ?r2? signals, dual tones for cidcw and 'on-hook' signaling systems and sufficient tones for simple melody generation. the iom ? -2 (isdn oriented modular revision 2) industry standard serial bus provides the digital interface to other telecommunications ics and supports both terminal and non-terminal (or line card) modes. the cmx625 is compatible with the cmx635 isdn subscriber processor and can be used to provide the additional pots port. it is available in both dip and ssop packages.
isdn ta pots interface 2 cmx625 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480223.001 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. contents section page 1 block diagram .................................................................................................................. ........................... 4 2 signal list .................................................................................................................... ................................ 5 3 external components............................................................................................................ ..................... 7 4 general description ............................................................................................................ ........................ 8 4.1 iom-2 serial bus interface................................................................................................. 8 4.2 terminal mode.................................................................................................................. .9 4.3 non-terminal modem (non-te) ....................................................................................... 11 4.4 monitor channel handshake protocol.............................................................................. 12 4.5 monitor channel identification command ........................................................................ 14 4.6 pcm codec filter............................................................................................................. 15 4.7 rx input amplifier............................................................................................................. 15 4.8 tx output buffer .............................................................................................................. 1 5 4.9 tone/fsk encoder and tone encoder ............................................................................ 16 4.10 spm generator................................................................................................................ 18 4.11 transmit signal control ................................................................................................... 19 4.12 tx uart........................................................................................................................ .. 20 4.12.1 typical uart timings .......................................................................................................... 2 0 4.13 dtmf tone decoder ....................................................................................................... 21 4.14 register set ................................................................................................................... .. 22 4.14.1 write only registers ........................................................................................................... .. 22 4.14.2 read only registers............................................................................................................ .22 4.15 programming the cmx625............................................................................................... 23 4.16 glossary ....................................................................................................................... ... 24 5 application notes .............................................................................................................. ....................... 25 5.1 telecom tones ................................................................................................................ 25 5.1.1 ringing signals ................................................................................................................ ..... 25 5.1.2 on hook ?cpe alert tones ................................................................................................... 26 5.1.3 nynex (mraa) - amr alert tones (single tone) .............................................................. 26 5.1.4 single frequency call progress tones ................................................................................ 26 5.1.5 dual frequency call progress tones................................................................................... 27 5.1.6 dual tone multi frequency generation................................................................................ 27 5.1.7 special information tones, fax and modem tones and customer premises alert tones . 27 5.1.8 ccitt ?r1? signaling tones ................................................................................................. 28 5.1.9 ccitt ?r2? signaling tones ................................................................................................. 28
isdn ta pots interface 3 cmx625 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480223.001 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. 6 performance specification...................................................................................................... ................. 29 6.1 electrical performance..................................................................................................... 29 6.1.1 absolute maximum ratings .................................................................................................. 29 6.1.2 operating limits............................................................................................................... ..... 29 6.1.3 operating characteristics ..................................................................................................... 3 0 6.1.4 timing ......................................................................................................................... .......... 33 6.2 packaging...................................................................................................................... .. 34 mx-com, inc. reserves the right to changes specifications at any time and without notice.
isdn ta pots interface 4 cmx625 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480223.001 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. 1 block diagram rx- rx+ rxampout tx uart status & irq status & irq dtmf tone decoder bus fsc dcl du dd irq iom -2 serial bus interf ace ? fsk / tones tx registers setup & mode registers status register pcm codec registers rom tone encoder tone / fsk encoder tx signal control ring pcm adc a-law / -law tonefsk vbias dac out txout txout tx- sa2 sa1 sa0 te/nte ds interrupt generator pcm dac a-law / -law tx output buffer enable rx input amplifier enable analog loopbac k digital loopbac k spm gener ator spm reset iom is a registered tr ademar k of siemens a g ? v dd v bias v ss figure 1: block diagram
isdn ta pots interface 5 cmx625 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480223.001 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. 2 signal list cmx625 d5/p4 signal pin no. name type description 1 fsc input the iom-2 frame synchronization clock. this is an 8khz clock indicating the start of the frame. fsc is generated by the upstream device. see section 4.1, 4.2, and 4.3. 2 dcl input the iom-2 data clock. it is used to clock data on and off the bus and operates at 1.536mhz for terminal mode (te) or 4.096mhz for non-terminal mode (non-te or line card mode). dcl is generated by the upstream device. when the bus is deactivated, dcl is held in a low state. see section 4.1, 4.2, and 4.3. 3 dd bi-directional the iom-2 data downstream, receives data from the network. when the bus is deactivated or when data is not being transmitted, dd is high impedance. the ic channel bus reversal (te mode only) allows ic1 and ic2 data to be transmitted on the dd pin. see section 4.1, 4.2, 4.3, and 4.6. an external pull-up resistor is required. 4 du bi-directional the iom-2 data upstream, transmits data to the network. when the bus is deactivated or when data is not being transmitted, du is high impedance. the ic channel bus reversal (te mode only) allows ic1 and ic2 data to be received on the du pin. see section 4.1, 4.2, 4.3, and 4.6. an external pull-up resistor is required. 5 te/nte input the iom-2 two modes of operation: te = 0 selects terminal mode. nte = 1 selects non-terminal mode or line card mode. see section 4.1, 4.2, and 4.3. 6 sa0 input 7 sa1 input 8 sa2 input the iom-2 slot address, provides one of 8 unique addresses. it allows the device to be individually addressed when more than one device is connected to the iom-2 bus. see section 4.2 and 4.3. 9 ds input the iom-2 device select pin (nte mode only). allows two cmx625 devices sharing a slot address to be individually addressed. ds = 0 selects device one. ds = 1 selects device two. see section 4.2 and 4.3. 10 reset input the external reset pin clears all the registers. (reset=1) 11 irq output a ?wire-orable? output interrupt request. this output is pulled down to v ss when active and is high impedance when inactive. an external pull-up resistor is required. 12 v ss power the negative supply rail (ground). 13 rx+ input the non-inverting input of the receive op-amp. 14 rx- input the inverting input of the receive op-amp. 15 rxout output the output of the receive op-amp. 16 v bias output an internally generated bias voltage of v dd /2, except when the device has been reset, v bias will discharge to v ss . it should be decoupled to v ss by a capacitor mounted close to the device pins. 17 tonefsk output the sinewave output of the tones and fsk signal generators. 18 txout output the output of the buffer amplifier. 19 tx- input the inverting input to the buffer amplifier. 20 txout output the inverted output of the buffer amplifier. 21 dac out output the output from the digital-to-analog converter.
isdn ta pots interface 6 cmx625 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480223.001 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. cmx625 d5/p4 signal pin no. name type description 22 ring output the square, trapezoidal and sinusoidal wave output from the ringing signal generator. 23 spm output the sinewave output of the spm signal generator. 24 v dd power the positive supply rail. levels and thresholds within the device are proportional to this voltage. it should be decoupled to v ss by a capacitor mounted close to the device pins. this device is capable of detecting and decoding small amplitude signals. to achieve this v dd and v bias decoupling and protecting the receive path from extraneous in-band signals are very important. it is recommended that the printed circuit board is laid out with a ground plane in the cmx625 area to provide a low impedance connection between the v ss pin and the v dd and v bias decoupling capacitors.
isdn ta pots interface 7 cmx625 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480223.001 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. 3 external components 16 21 20 15 19 24 14 18 23 13 17 22 1 2 3 4 5 9 6 10 7 11 8 12 irq te/nte fsc dd sa1 sa2 dcl du sa0 ring rxampout tonefsk txout tx- txout rx+ dac out rx- r1 c1 c2 v ss v dd v dd v dd cmx625 ds iom -2 bus interface ? r2 r3 c3 c4 rx in v ias b tx in r4 r5 c5 r6 v dd r7 spm reset v bias figure 2: recommended external components r1, r3, r5 100k ? 1 c1, c2 1.0f r2 note 1 c3 note 1 r4 note 2 c4, c5 220pf r6, r7 1.5k ? resistor 5%, capacitors 10% unless otherwise stated. table 1: recommended external components note: 1. r2, r3, c3 and c4 form the gain components for the rx input amplifier. r2 should be chosen as required by the signal level, using the following formula: gain = ? r3 r2 c3 and r2 should be chosen so as not to compromise the low frequency performance. 2. r4 should be selected to give the desired transmit level.
isdn ta pots interface 8 cmx625 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480223.001 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. 4 general description the cmx625 is a telecom tone generator, dtmf tone encoder/decoder and pcm codec-filter for isdn interfaces. the pcm codec-filter performs voice digitization and reconstruction and incorporates encoder bandpass and decoder lowpass filters with pre and post-filtering with selectable a-law and -law companding following ccitt recommendation g.711. the device has separate output ports for the four different classes of signals encoded. these include ringing signals, in-band tones or fsk data at 1200bps, high frequency metering pulses (spm tones) and dac signals. it has a transmit level attenuator for in-band tones or fsk data and an envelope control for spm tones. the device also has an uncommitted tx output buffer for filtering and impedance matching. the functions are controlled via an iom-2 serial bus interface. frequency and timing accuracy of the cmx625 is supplied by the data clock (dcl) of the iom-2 serial bus interface. if the bus is deactivated, dcl is held in a low state. the cmx625 can be reset externally by driving the reset pin low. it resets all the internal register bits and ensures that the interface always starts from a known state. the device can also be reset by issuing a reset command. see section 4.14. commands to enable and disable individual functions are also shown in this section. approximately 50ms should be allowed for the tx dc level to settle at v bias before enabling the tx functions (set bit 6 of the mode register to ?1?) after the cmx625 has been reset. 4.1 iom-2 serial bus interface the iom ? -2 (isdn oriented modular revision 2) is an industry standard serial bus for interconnecting telecommunications ic?s. (refer to the iom-2 interface reference guide, industry standard bus by advanced micro devices). the bus is an evolution of the iom? interface and is also known as the gci (general circuit interface). the iom-2 bus provides a symmetrical full duplex communication link, containing user data, control/programming and status channels. there are two basic modes of operation known as terminal mode (te mode) and non-terminal mode (non-te or line card mode). these modes differ in the frame structure and data rate. the frame rate remains at 8khz for each mode. the cmx625 acts as a timing and control slave to the upstream device. the various channels are time multiplexed over a basic four wire serial interface, namely fsc, dcl, dd and du. frames are delimited by an 8khz frame synchronization clock (fsc) which is generated by the upstream device. the data clock (dcl) clocks data on and off the bus and runs at either 1.536mhz (te mode) or 4.096mhz (non-te mode). it is always generated by the upstream device. data downstream (dd) receives data from the network. data upstream (du) transmits data to the network. when the bus is deactivated or when data is not being transmitted, dd and du is held in a high impedance state. the dd and du bus are driven by open drain transistors such that all dd?s and du?s can be connected together. bus reversal (in te mode) allows the dd and du pins to be both inputs and outputs in the ic1 and ic2 channels. it allows use of the cmx625 with post processing devices that are iom-2 compliant. when other devices are connected to the iom-2 bus the three slot address pins (sa0, sa1 and sa2) provide a unique address, allowing the cmx625 to be individually addressed. the device select pin (ds) allows two cmx625 devices sharing a slot address to be individually addressed in non-te mode. the remote digital iom loopback is enabled when bit 3 of the iom control register is set to ?1?. this loops back the data arriving on the iom-2 bus and sends it back again. unused bits in the frame structure are ignored if not required by the cmx625. these bits will be set to '1' when the frame is transmitted upstream.
isdn ta pots interface 9 cmx625 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480223.001 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. 4.2 terminal mode terminal mode (te) frame structure consists of 3 channels of 4 bytes each repeated at 8khz, i.e. 96 bits in 125 s or a data rate of 768kbps. the data clock (dcl) operates at twice the data rate, i.e. 1.536mhz. figure 3 shows the te mode frame structure. fsc = 8khz dcl = 1.536mhz dd, du = 768kbps figure 3: terminal mode frame structure ?channel 0? is used for passing user data (2b+d channels) and controlling (mon0 and c/i0) the layer 1 transceiver. only ?channel 1? is used by the cmx625. ?channel 2? is reserved for d channel arbitration. the 12 byte frame contains the following channels: (i) the ?b? channels consist of two 64kbps data channels, labeled b1 and b2, and transfer b channel data to and from the network. (ii) the ?monitor? channels consist of two programming channels, labeled mon0 and mon1. each channel consists of 8 bits of data and has two associated pair of handshake bits that control data flow, mx and mr (monitor transmit and receive). the handshake procedure is described in section 4.4. the mon1 channel is used for programming and controlling devices attached to the iom-2 interface. the cmx625 is programmed via the mon1 channel (see section 4.15). the mon0 channel is not used. monitor channel contention is avoided by a ?speak when spoken to? system whereby the cmx625 is given a unique address, programmed with the 3 slot address pins (sa0 to sa2) and 1 device select pin (ds) and only responds when that address is broadcast by the master device (see section 4.14). the monitor channel address byte is shown below: bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 mon channel address byte 1 slot address sa2 slot address sa1 slot address sa0 device select ds 0 0 0 the cmx625 cannot initiate mon communication directly in a multi-slave application. each slave must monitor the mon channel for its unique address in the first byte before processing the following command. each slave can therefore only drive the du mon channel when specifically requested to by the master. (iii) the ?d? channel consists of two bits providing 16kbps for carrying d channel user data. this channel is not used by the cmx625.
isdn ta pots interface 10 cmx625 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480223.001 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. (iv) the ?command/indicate? channels, labeled c/i0 and c/i1, provide real time status information between devices connected via the iom-2 bus. the c/i0 in channel 0 consists of 4 bits and the c/i1 in channel 1 is 6 bits wide. the c/i0 in channel 0 is not used. the c/i1 channel is shared by all devices on the iom-2 bus with no mechanism for determining and resolving contention. if multiple slave devices are expected to drive the c/i1 channel then care must be taken to allocate different bits to each device. an example of c/i1 channel usage would be 6 slave devices each allocated one of the 6 c/i1 bits. when a slave requires attention it asserts its own bit, which is detected by the master as a c/i1 value change (generating a processor interrupt). the processor would then initiate mon1 communications with the appropriate slave and service its request. this is an example of one usage, but the c/i1 bits may be used for any real time command/indicate purpose dependent on system design and number of slaves on the iom-2 bus. the c/i1 channel output control code is encoded as follows (bits 0, 1 and 2 of the iom control register): c/i1 channel output control code (iom control register, bits 2, 1 and 0) c/i1 channel output bit content 0 0 0 c/i1 bits 5-0 = all logic ?1?, i.e. c/i1 output disabled 0 0 1 interrupt request (logic ?0?) on c/i1 bit 0) 0 1 0 interrupt request (logic ?0?) on c/i1 bit 1) 0 1 1 interrupt request (logic ?0?) on c/i1 bit 2) all other bits logic ?1? 1 0 0 interrupt request (logic ?0?) on c/i1 bit 3) 1 0 1 interrupt request (logic ?0?) on c/i1 bit 4) 1 1 0 interrupt request (logic ?0?) on c/i1 bit 5) 1 1 1 status register bits 7-2 on c/i1 bits 5-0 code ?000? is provided to disable drive of the c/i1 channel for use when multiple slaves have completely utilized the c/i1 channel resource. the interrupt mask register settings are ignored and the c/i1 bits are set to logic ?1?. for codes ?001? to ?110? a logic ?0? (interrupt request) is driven onto the appropriate c/i1 bit when the status register bits contain an unmasked logic ?1? (set by the interrupt mask register). this allows other devices to use the remaining c/i bits for their own purposes. the master device would use the change of the appropriate c/i bit to initiate a status register read from the cmx625. code ?111? and an unmasked status register (interrupt mask bits 2 to 7 are set to ?1?) allows the most significant 6 bits of the status register to be driven onto the c/i1 channel directly for use when the cmx625 is the only slave utilizing the c/i channel. if any of the status bits are masked, by setting the equivalent bit in the mask register to ?0?, then a logic ?0? will be routed to the appropriate c/i1 bit and will not change. (v) the ?intercommunication channel? consists of two 64kbps data channels, labeled ic1 and ic2, and provide additional communications paths between devices other than the layer 1 device (data to and from the layer 1 device is transferred over the b channels). (vi) the ?tic? (terminal ic) bus is used for connecting more than one device to the d and c/i0 channels in channel 0. the tic bus is not used by the cmx625.
isdn ta pots interface 11 cmx625 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480223.001 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. 4.3 non-terminal mode (non-te) the non-te mode (line card mode) frame structure consists of up to 8 channels of 4 bytes each repeated at 8khz, i.e. 256 bits in 125 s or a data rate of 2048kbps for 8 channel frames. the data clock (dcl) operates at twice the data rate, i.e. 4.096mhz. figure 4 shows the non-te mode frame structure. fsc = 8khz dcl = 4.096mhz dd, du = 2048kbps figure 4: non-terminal mode frame structure in non-te mode the iom-2 bus time multiplexes data, control and status information for up to eight iom-2 devices or up to 16 codec-filters over a single full duplex interface. the frames are subdivided into 8 channels, with one channel being dedicated to each iom-2 device or pair of codecs. each device on the iom-2 bus is assigned a slot address and only transmits to and receives from that time slot. pins sa0, sa1 and sa2 on the cmx625 are used to program the slot address. outside the allocated slot the transmit drivers will be set to high impedance to allow other devices to transmit in their own time slot. to allow two cmx625 devices to share the same slot a device select pin (ds) is made available. this pin forms part of the monitor channel address byte along with the slot address pins and allows either of the two devices sharing a slot to be individually addressed. see section 4.2, part (ii) mon channel address byte. this mechanism allows both the b1 and b2 data from the same time slot to be utilized by different devices. each channel consists of the following 4 bytes: (i) the first two bytes consist of two 64kbps data channels, labeled ?b1? and ?b2?, and transfer b channel data to and from the network. (ii) the third byte, labeled ?monitor?, is used for programming and controlling devices attached to the iom-2 interface. the data structure within the monitor channel is not defined and will be device specific. the cmx625 is programmed via the monitor channel (see section 4.15). (iii) in digital applications (isdn line cards) the fourth byte contains two bits for the 16kbps ?d? channel, four ?command/indicate? (c/i) bits for real time status information and two handshake bits for supporting the handling of the monitor channel, labeled ?mr? and ?mx? (monitor transmit and receive). the handshake procedure is described in section 4.4. in analog applications (analog line cards) there is no 'd' channel in the fourth byte so the adjacent c/i channel is increased to 6 bits. the c/i1 channel bits are used in the same way as for terminal mode.
isdn ta pots interface 12 cmx625 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480223.001 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. 4.4 monitor channel handshake protocol the monitor channel operates on an event driven basis. while data transfers on the bus take place synchronized to the frame sync, the flow of data is controlled by a handshake procedure using the outgoing mx (monitor transmit) and incoming mr (monitor receive) bits. data is placed onto the monitor channel and the mx bit is activated. this data will be transmitted repeatedly (once per 8khz frame) until the transfer is acknowledged (ack) via the mr bit. the actual data rate is not fixed but is dependent upon the response speed of the transmitter and receiver. the protocol is applicable to both te and non-te modes. figure 5: monitor handshake timing (general case) figure 5 shows the general case for monitor handshake timing. the first byte of data is placed on the bus and mx is activated (low). mx remains active and the data remains valid until an inactive-to-active transition of mr is received, indicating that the receiver has read the data off the bus. the next byte is placed on the bus after the inactive-to-active transmission of mr, as early as the next frame (there is no limit to the maximum number of frames). at the time that the second byte is transmitted, mx is returned inactive (high) for one frame (mx inactive for more than one frame indicates an end of message). in response to mx going active (low), mr will be deactivated (high) for one frame (the mx inactive to mr inactive delay can be any number of frames). this procedure is repeated for each additional byte. the transmitter sends an end of message (eom), after the last byte of data has been transmitted, by not reactivating mx after deactivating it. the receiver can hold off the transmitter by keeping mr active until the receiver is ready for the next byte. the transmitter will not start the next transmission cycle until mr goes inactive. the transmitter is able to abort a transmission by holding mx inactive (high) for two or more frames, this will generate an interrupt when the interrupt mask register bit 3 is unmasked (logic ?1?) and bit 3 of the status register will be set to ?1?.
isdn ta pots interface 13 cmx625 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480223.001 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. figure 6 shows the monitor channel handshake procedure. mx = monitor transmit bit, active low. mr = monitor receive bit, active high. md = monitor data figure 6: monitor channel handshake procedure figure 7 shows the maximum speed case for monitor handshake timing. the transmitter can be designed for a higher data throughput than is provided by the general case. the transmitter can deactivate (high) mx and transmit new data one frame after mr is deactivated. in this way, the transmitter is anticipating that mr will be reactivated one frame after it is deactivated, minimizing the delay between bytes. mr being held inactive (high) for two or more frames indicates an abort is being signaled by the receiver. figure 7: monitor handshake timing (maximum speed case)
isdn ta pots interface 14 cmx625 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480223.001 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. the abort is a signal from the receiver to the transmitter indicating that data has been missed. the receiver is able to abort a transmission by holding mr inactive (high) for two or more frames in response to mx going active. an abort from the receiver will generate an interrupt when the interrupt mask register bit 2 is unmasked (logic ?1?) and bit 2 of the status register will be set to ?1?. figure 8 shows a monitor abort request from the receiver. figure 8: abort request from the receiver 4.5 monitor channel identification command in order to be able to identify different devices on the iom-2 bus, an identification command is sent. this allows the software to identify different manufacturer's devices on the bus. the identification sequence is usually done once, when the device is connected for the first time. a device requesting the identity of a connected cmx625 will transmit the following 2 byte command: bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit 0 dd 1 st byte 1 sa2 sa1 sa0 ds 0 0 0 dd 2 nd byte 0 0 0 0 0 0 0 0 the cmx625 responds by transmitting: bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit 0 du 1 st byte 1 sa2 sa1 sa0 ds 0 0 0 monitor channel address byte du 2 nd byte 1 0 0 1 1 0 0 1 device identification byte sa(2-0) = slot address, ds = device select (see sections 4.2 and 4.3). see section 4.14 for the device identification register.
isdn ta pots interface 15 cmx625 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480223.001 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. 4.6 pcm codec filter the pcm codec-filter performs voice digitization and reconstruction and incorporates encoder bandpass and decoder lowpass filters with pre and post-filtering with selectable a-law and -law companding. in each case the coder and decoder process a companded 8-bit pcm word following ccitt recommendation g.711 for a- law and -law conversion. the encoder bandpass filter and decoder lowpass filter provide passband flatness and stopband rejection according to ccitt recommendation g.712. the lowpass filter contains the required (sin x)/x compensation. the pcm codec-filter block is enabled or disabled by bit 7 of the codec control register. the companding law is selected by bit 6. when this bit is a ?0?, a-law companding is selected (used in europe) and when this bit is a ?1?, -law is selected (used in the usa and japan). the pcm codec channel routing is shown in the table below for normal operation and bus reversal. in ?normal? operation, bit 4 of the iom control register is set to ?0?, the data is transmitted on the data upstream (du) pin and received on the data downstream (dd) pin. bits 6 and 7 of the iom control register select whether the data is transmitted or received on the b1, b2, ic1 or ic2 channels of the iom-2 bus. the b1 and b2 channels are available in te and non-te mode but the ic1 and ic2 channels are only available in te mode. codec channel input/output select ic channel bus reversal (iom control register bit 4) codec channel select (iom control register, bits 7 and 6) codec data from codec data to 0 0 0 b1, dd b1, du 0 0 1 b2, dd b2, du 0 1 0 ic1, dd ic1, du normal 0 1 1 ic2, dd ic2, du 1 0 0 b1, dd b1, du 1 0 1 b2, dd b2, du 1 1 0 ic1, du ic1, dd reverse 1 1 1 ic2, du ic2, dd in terminal mode (te) it may also be necessary to transmit on the data downstream (dd) pin and receive on the data upstream (du) pin during the ic1 and ic2 time slots. this can be achieved by selecting bus reversal and allows use of the cmx625 with post processing devices, such as speech scramblers, that are iom-2 compliant. bus reversal is enabled when bit 4 of the iom control register is set to ?1? and programming the appropriate codec channel select bits 6 and 7 of the iom control register. when bus reversal is active, the master device and any other devices capable of bus reversal, are prohibited from broadcasting in the active ic channel. the local codec loopback controls the internal paths such that loopback tests can be performed (see figure 1). local digital codec loopback is enabled when bit 4 of the codec control register is set to ?1?. this internally connects the adc output to the dac input. local analog codec loopback is enabled when bit 5 of the codec control register is set to ?1?. this internally connects the dac output to the adc input (the connection to the rx amp is broken). data is loaded and read via the iom-2 bus using the channels shown in the above table. 4.7 rx input amplifier this amplifier, with suitable external components, is used for adjusting the received signal to the correct amplitude for the dtmf decoder and the pcm analog-to-digital converter. see figure 2. 4.8 tx output buffer this buffer is enabled by bit 7 of the setup register. with suitable external components it can be used for filtering and impedance matching. see figure 2.
isdn ta pots interface 16 cmx625 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480223.001 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. 4.9 tone/fsk encoder and tone encoder these blocks are enabled or disabled by bit 6 of the setup register. when bit 5 of the mode register is set to ?1? then these blocks generate fsk signals as determined by bit 0 of the setup register and the tx data bits from the uart block, as shown in the table below: setup register bit 0 tone/fsk generator fsk signal frequency ?0? (space) fsk signal frequency ?1? (mark) 0 v.23 1200bps fsk 2100hz 1300hz 1 bell 202 1200bps fsk 2200hz 1200hz when bit 5 of the mode register is set to ?0?, these blocks generate single or dual tones from the range shown in the tables on the following pages. bit 6 of the mode register is then used to enable or disable the block?s output to the tx signal control, ring and tonefsk outputs. there are four tone fields addressed by bits 0 and 1 of the mode register. tone field 0, mode register bit 1 and bit 0 = ?0? and ?0? respectively. tx tones register bits 4-7 tx tones register bits 0-3 d7 d6 d5 d4 frequency (hz) d3 d2 d1 d0 frequency (hz) 0 0 0 0 0 = off 0 0 0 0 0 = off 0 0 0 1 252.4 0 0 0 1 * 17.1 0 0 1 0 268.7 0 0 1 0 * 20.5 0 0 1 1 285.3 0 0 1 1 * 24.9 0 1 0 0 315.5 0 1 0 0 * 34.1 0 1 0 1 330.5 0 1 0 1 * 41.0 0 1 1 0 375.2 0 1 1 0 * 51.2 0 1 1 1 404.3 0 1 1 1 - 1 0 0 0 468.0 1 0 0 0 262.9 1 0 0 1 495.8 1 0 0 1 293.6 1 0 1 0 520.6 1 0 1 0 348.2 1 0 1 1 548.0 1 0 1 1 392.6 1 1 0 0 562.8 1 1 0 0 1600 1 1 0 1 578.4 1 1 0 1 1633 1 1 1 0 595.0 1 1 1 0 1827 1 1 1 1 612.5 1 1 1 1 587.2 * these outputs are routed to the ring digital output instead of the tonefsk output. any single tone output level at tonefsk output is 0dbm.
isdn ta pots interface 17 cmx625 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480223.001 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. tone field 1, mode register bit 1 and bit 0 = ?0? and ?1? respectively tx tones register bits 4-7 tx tones register bits 0-3 d7 d6 d5 d4 frequency (hz) d3 d2 d1 d0 frequency (hz) 0 0 0 0 0 = off 0 0 0 0 0 = off 0 0 0 1 120 0 0 0 1 330 0 0 1 0 150 0 0 1 0 416 0 0 1 1 154 0 0 1 1 420 0 1 0 0 250 0 1 0 0 425 0 1 0 1 300 0 1 0 1 433 0 1 1 0 350 0 1 1 0 440 0 1 1 1 360 0 1 1 1 450 1 0 0 0 367 1 0 0 0 460 1 0 0 1 375 1 0 0 1 480 1 0 1 0 380 1 0 1 0 500 1 0 1 1 383 1 0 1 1 600 1 1 0 0 400 1 1 0 0 620 1 1 0 1 450 1 1 0 1 720 1 1 1 0 475 1 1 1 0 930 1 1 1 1 480 1 1 1 1 - tone field 2, mode register bit 1 and bit 0 = ?1? and ?0? respectively tx tones register bits 4-7 tx tones register bits 0-3 d7 d6 d5 d4 frequency (hz) d3 d2 d1 d0 frequency (hz) 0 0 0 0 0 = off 0 0 0 0 0 = off 0 0 0 1 700 0 0 0 1 700 0 0 1 0 900 0 0 1 0 900 0 0 1 1 1100 0 0 1 1 1100 0 1 0 0 1300 0 1 0 0 1300 0 1 0 1 1500 0 1 0 1 1500 0 1 1 0 1700 0 1 1 0 1700 0 1 1 1 - 0 1 1 1 - 1 0 0 0 950 1 0 0 0 2100 1 0 0 1 1400 1 0 0 1 2225 1 0 1 0 1800 1 0 1 0 - 1 0 1 1 2130 1 0 1 1 2750 1 1 0 0 697 1 1 0 0 1209 1 1 0 1 770 1 1 0 1 1336 1 1 1 0 852 1 1 1 0 1477 1 1 1 1 941 1 1 1 1 1633
isdn ta pots interface 18 cmx625 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480223.001 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. tone field 3, mode register bit 1 and bit 0 = ?1? and ?1? respectively tx tones register bits 4-7 tx tones register bits 0-3 d7 d6 d5 d4 frequency (hz) d3 d2 d1 d0 frequency (hz) 0 0 0 0 0 = off 0 0 0 0 0 = off 0 0 0 1 540 0 0 0 1 540 0 0 1 0 660 0 0 1 0 660 0 0 1 1 780 0 0 1 1 780 0 1 0 0 900 0 1 0 0 900 0 1 0 1 1020 0 1 0 1 1020 0 1 1 0 1140 0 1 1 0 1140 0 1 1 1 - 0 1 1 1 - 1 0 0 0 1380 1 0 0 0 1380 1 0 0 1 1500 1 0 0 1 1500 1 0 1 0 1620 1 0 1 0 1620 1 0 1 1 1740 1 0 1 1 1740 1 1 0 0 1860 1 1 0 0 1860 1 1 0 1 1980 1 1 0 1 1980 1 1 1 0 - 1 1 1 0 - 1 1 1 1 - 1 1 1 1 - 4.10 spm generator this block operates independently and has its own output pin. it can transmit 12khz or 16khz and is controlled by bit 4 of the setup register. bit 7 of the mode register is used to enable or disable this block. the signal has a rise and fall time each of about 4ms. the spm signal rises from the bias level to 0dbm in 16 steps of 2db magnitude, and falls from 0dbm to bias level in 16 steps of 2db magnitude.
isdn ta pots interface 19 cmx625 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480223.001 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. 4.11 transmit signal control this block adjusts the amplitude of the fsk transmit signal output level, the level skew between dtmf tones and the signal routing to the output ports. output signal levels are proportional to v dd . the nominal output signal levels (at 0db attenuation and v dd = 5.0v) are: single tone 0dbm dual tone (per tone) -3dbm dtmf high frequency tone -3dbm dtmf low frequency tone -5dbm fsk signal 0dbm the level attenuator provides for level adjustment from 0db to -14db in -2db steps. the typical level is determined by bits 2 to 4 of the mode register as shown in the table below: mode register signal level adjustment bit 4 bit 3 bit 2 (db) 0 0 0 0 0 0 1 -2 0 1 0 -4 0 1 1 -6 1 0 0 -8 1 0 1 -10 1 1 0 -12 1 1 1 -14 the ring signal is a square, trapezoidal or sinusoidal wave. the square and trapezoidal wave have an amplitude of v dd peak to peak and the sinusoidal wave has an amplitude of v dd /2 peak to peak. the trapezoidal ringing waveform has a crest factor (cf) of 1.35. bits 2 and 3 of the setup register select the waveform type as shown in the table below. when the ring signal is not selected, the ring output pin is connected to v ss . setup register ring signal select bit 3 bit 2 0 0 square wave 0 1 trapezoidal wave 1 0 sinusoidal wave
isdn ta pots interface 20 cmx625 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480223.001 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. 4.12 tx uart this block connects the iom-2 serial bus interface to the fsk encoder. the block can be programmed to convert transmit data from 8-bit bytes to asynchronous data characters by adding start and stop bits. the transmit data is then passed to the fsk encoder. data to be transmitted should be loaded, via the iom-2 bus interface, into the tx data register when the tx data ready bit (bit 6) of the status register goes high. it will then be treated by the tx uart block in one of two ways, depending on the setting of bit 1 of the setup register: if bit 1 of the setup register is ?0? (tx sync mode) then the 8 bits from the tx data register will be transmitted sequentially at 1200bps, lsb (d0) first. if bit 1 of the setup register is ?1? (tx async mode) then bits will be transmitted as asynchronous data characters at 1200 bps according to the following format: one start bit (space) eight data bits (d0-d7) from the tx data register, with the lsb (d0) transmitted first one stop bit (mark) failure to load the tx data register with a new value when required will result in bit 7 (tx data underflow) of the status register being set to ?1?. if the ?tx async? mode of operation is selected then a continuous mark (?1?) signal will be transmitted until a new value is loaded into tx data. if the ?tx sync? mode is selected then the byte already in the tx data register will be re-transmitted. tx data register loaded: digital tx signal: analog fsk signal: tx data ready flag bit: tx data underflow flag bit: d0 d0 start start stop d1 d2 d3 d4 d5 d6 d7 d0 start stop d1 d2 d3 d4 d5 d6 d7 t fsk t dly t drdy t ufl figure 9: transmit uart function (async) tx data register loaded: digital tx signal: analog fsk signal: tx data ready flag bit: tx data underflow flag bit: d0 d0 d0 d1 d1 d2 d2 d3 d3 d4 d4 d5 d5 d6 d6 d7 d7 t fsk t dly t drdy t ufl figure 10: transmit uart function (sync) 4.12.1 typical uart timings typical uart timings (see figure 9 and figure 10 min. typ. max. unit t fsk delay through the modulator - 106 - s t dly 1 bit period - 833 - s t drdy ? bit-period - 208 - s t ufl ? bit-period - 625 - s
isdn ta pots interface 21 cmx625 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480223.001 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. 4.13 dtmf tone decoder this block is enabled or disabled by bit 5 of the setup register. if disabled, bit 4 and 5 of the status register and bit 0 to bit 3 of the dtmf rx data register are set to ?0? and no interrupts are generated. when enabled (set to ?1?), a status change of the decoder will generate an interrupt when the interrupt mask register bit 5 is unmasked (logic ?1?) and bit 5 of the status register will be set to ?1?. the validity of the data is indicated by bit 4 of the status register. the decode truth table is shown below: dtmf rx data register bits 0 - 3 dtmf tone pairs bit 3 (d3) bit 2 (d2) bit 1 (d1) bit 0 (d0) lower frequency (hz) upper frequency (hz) keypad legend 0 0 0 0 941 1633 d 0 0 0 1 697 1209 1 0 0 1 0 697 1336 2 0 0 1 1 697 1477 3 0 1 0 0 770 1209 4 0 1 0 1 770 1336 5 0 1 1 0 770 1477 6 0 1 1 1 852 1209 7 1 0 0 0 852 1336 8 1 0 0 1 852 1477 9 1 0 1 0 941 1336 0 1 0 1 1 941 1209 * 1 1 0 0 941 1477 # 1 1 0 1 697 1633 a 1 1 1 0 770 1633 b 1 1 1 1 852 1633 c a status change of the decoder and the generation of an interrupt (when the interrupt mask register bit 5 is unmasked) will occur both when a tone is first decoded and also when a tone, which was previously present, is no longer decoded. in the latter case, bit 4 of the status register will be set to ?0? to indicate that no tone was detected.
isdn ta pots interface 22 cmx625 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480223.001 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. 4.14 register set 4.14.1 write only registers data byte structure addr. register 7 6 5 4 3 2 1 0 $1 reset n/a n/a n/a n/a n/a n/a n/a n/a $3 setup tx output buffer 0=disable 1=enable tx enable 0=disable 1=enable dtmf rx: 0=disable 1=enable spm: 0=12khz 1=16khz ring signal select [1] ring signal select [0] fsk mode: 0=sync 1=async fsk mode: 0=v.23 1=bell 202 $4 mode spm o/p: 0=disable 1=enable tone/fsk: 0=disable 1=enable tone/fsk: 0=tone 1=fsk tx level: msb tx level: tx level: lsb tone fields: msb tone fields: lsb $5 tx data d7 msb d6 d5 d4 d3 d2 d1 d0 lsb $6 tx tones d7 msb d6 d5 d4 lsb d3 msb d2 d1 d0 lsb $8 iom control codec channel select [1] codec channel select [0] 0 ic channel bus reversal 0=normal 1=reverse remote digital iom loopback 0=no loopbk 1=loopback c/i1 channel output control [2] c/i1 channel output control [1] c/i1 channel output control [0] $9 interrupt mask mask status [7] mask status [6] mask status [5] mask status [4] mask status [3] mask status [2] 0 0 $c codec control codec enable 0=disable 1=enable pcm codec: 0=a-law 1=-law local analog loopback 0=no loopbk 1=loopback local digital codec loopback 0=no loopbk 1=loopback 0 0 0 0 4.14.2 read only registers data byte structure addr. register 7 6 5 4 3 2 1 0 $0 device id 1 0 0 1 1 0 0 1 $a status fsk mode: fsk tx data underflow fsk mode: fsk tx data ready dtmf rx: status change dtmf rx: 1=detected 0=no tone time out iom: tx abort iom: rx abort 0 0 $b dtmf rx data 0 0 0 0 dtmf: rx data (d3 msb) dtmf: rx data (d2) dtmf: rx data (d1) dtmf: rx data (d0 lsb) notes: 1. accessing the reset register clears all of the bits in the setup, mode, tx data, tx tones, iom control, interrupt mask, codec control, status and dtmf rx data registers and will initialize the device. this a single-byte transaction consisting of the address byte value $1. 2. if any of bits 2, 3, 4, 5, 6 or 7 of the status register is ?1? then the irq output will be pulled low when the appropriate bit contains an unmasked logic ?1? in the interrupt mask register. 3. reading the status register clears the irq output and also clears bits 2, 3, and 5 of the status register, if set. bits 6 and 7 of the status register are cleared on writing to the tx data register.
isdn ta pots interface 23 cmx625 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480223.001 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. 4.15 programming the cmx625 the cmx625 is programmed via the ?mon1? (monitor channel 1) channel in te mode and the ?monitor? channel in non-te mode. the programming sequence consists of 3 consecutive monitor bytes: the iom-2 address, the cmx625 command and data byte. before executing a command, the cmx625 compares the received iom-2 address byte with its own address. the msb of the iom-2 address is always a ?1? (see section 4.2). a logical ?1? in the msb of the cmx625 command represents a write operation and a logical ?0? represents a read operation. structure for register read/write operations: iom command register r/w 0=read 1=write 0 x x register address a3 register address a2 register address a1 register address a0 example 1: program the cmx625 to generate interrupt requests for dtmf rx status change on bit 5 of c/i channel, i.e. c/i1 channel output control code (2-0)=110. set iom-2 address to sa2-sa0=010 and device select, ds=1. mx (dd) mr (du) dd (hex) mx (du) mr (dd) du (hex) comment 1 1 ff 1 1 ff monitor channel idle state 0 1 a8 1 1 ff transmit iom-2 address 0 0 a8 1 1 ff acknowledge address 1 0 88 1 1 ff transmit command (write iom-2 control, $8) 0 1 88 1 1 ff 1 0 06 1 1 ff acknowledge command/ transmit iom-2 control data 0 1 06 1 1 ff 1 0 ff 1 1 ff acknowledge data 1 1 ff 1 1 ff end of transmission 0 1 a8 1 1 ff transmit iom-2 address 0 0 a8 1 1 ff acknowledge address 1 0 89 1 1 ff transmit command (write mask register, $9) 0 1 89 1 1 ff 1 0 20 1 1 ff acknowledge command/ transmit iom-2 control data 0 1 20 1 1 ff 1 0 ff 1 1 ff acknowledge data 1 1 ff 1 1 ff end of transmission 1 1 ff 1 1 ff idle if the command is a register read then only the address and command bytes are sent. the cmx625 will respond with an iom-2 register address byte followed by the read data. the iom-2 register address byte consists of the register address that is being read in the least significant 4 bits and the iom-2 address (less the device select bit) in the most significant 4 bits.
isdn ta pots interface 24 cmx625 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480223.001 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. example 2: read the cmx625 dtmf rx data register, d3-d0=$a. set iom-2 address to sa2-sa0 =100 and device select, ds=0. mx (dd) mr (du) dd (hex) mx (du) mr (dd) du (hex) comment 1 1 ff 1 1 ff monitor channel idle state 0 1 c0 1 1 ff transmit iom-2 address 0 0 c0 1 1 ff acknowledge address 1 0 0b 1 1 ff transmit command (write iom-2 control, $b) 0 1 0b 1 1 ff 1 0 ff 0 1 cb acknowledge command/ send address 1 1 ff 0 0 cb address acknowledged 1 1 ff 1 0 0a send dtmf read data 1 1 ff 0 1 0a 1 1 ff 1 0 ff data acknowledged 1 1 ff 1 1 ff end of transmission 1 1 ff 1 1 ff idle 4.16 glossary adc analog to digital converter ccitt international telegraph and telephone consultative committee cidcw caller identification during call waiting codec coder/decoder dac digital to analog converter dtmf dual tone multiple frequency fsk frequency shift keying gci general circuit interface iom-2 isdn oriented modular revision 2 isdn integrated services digital network itu international telecommunication union ntu network termination unit pc personal computer pcm pulse code modulation pots plain old (analog) telephone service spm subscriber pulse metering
isdn ta pots interface 25 cmx625 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480223.001 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. 5 application notes when using the tone/fsk bit (bit 6) of the mode register, each tone starts from v bias, and returns to v bias before ending: figure 11: tone starting and stopping when switching between tones in the same column (bits 4 - 7 or bits 0 - 3) of the tx tones register), the transition will be phase continuous. however, switching to the ?off? state will immediately take the output of that tone generator to v bias . figure 12: tone changing the tx tones register which does not have a frequency allocated is indicated by ?-? in the tone field tables. these values should not be used. 5.1 telecom tones the following tables give the hex codes to be programmed into the particular tone field location for various telecommunications systems applications. the tables are not exhaustive, but list the more commonly used tones. 5.1.1 ringing signals (f 2.5%) (hz) field 0 (hex) off $00 16.7 $01 20 $02 25 $03 35 $04 40 $05 50 $06
isdn ta pots interface 26 cmx625 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480223.001 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. 5.1.2 on hook cpe alert tones single tone (hz) field 0 (hex) dual tone (hz) field 0 (hex) 375.2 $60 375.2+1827 $6e 404.3 $70 404.3+1827 $7e 468 $80 468+1827 $8e 495.8 $90 495.8+1827 $9e 520.6 $a0 520.6+1827 $ae 548 $b0 548+1827 $be 562.8 $c0 562.8+1827 $ce 578.4 $d0 578.4+1827 $de 1633 $0d 5.1.3 nynex (mraa) - amr alert tones (single tone) group a (hz) field 0 (hex) group b (hz) field 0 (hex) 252.4 $10 468 $80 268.7 $20 495.8 $90 285.3 $30 520.6 $a0 315.5 $40 562.8 $c0 330.5 $50 595 $e0 375.2 $60 612.5 $f0 5.1.4 single frequency call progress tones (hz) field 1 (hex) off $00 120 $10 150 $20 154 $30 250 $40 300 $50 350 $60 400 $c0 425 $04 440 $06 450 $07 480 $09 500 $0a 600 $0b 620 $0c
isdn ta pots interface 27 cmx625 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480223.001 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. 5.1.5 dual frequency call progress tones additive mixing (hz) field 1 (hex) multiplicative mixing (hz) field 1 (hex) off $00 350+440 $66 400*16.2 $b2 440+480 $f6 400*20 $a3 480+620 $fc 400*25 $94 400+425 $c4 400*33 $85 400+450 $c7 400*40 $76 425+450 $d4 400*50 $67 425+480 $f4 450*25 $e4 120+620 $1c 600*120 $fd 150+450 $27 5.1.6 dual tone multi frequency generation (hz) field 2 (hex) off $00 941+1633 $ff 697+1209 $cc 697+1336 $cd 697+1477 $ce 770+1209 $dc 770+1336 $dd 770+1477 $de 852+1209 $ec 852+1336 $ed 852+1477 $ee 941+1336 $fd 941+1209 $fc 941+1477 $fe 697+1633 $cf 770+1633 $df 852+1633 $ef 5.1.7 special information tones, fax and modem tones and customer premises alert tones (hz) field 2 (hex) off $00 950 $80 1100 $30 1300 $40 1400 $90 1800 $a0 2100 $08 2225 $09 2130+2750 $bb
isdn ta pots interface 28 cmx625 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480223.001 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. 5.1.8 ccitt ?r1? signaling tones (hz) field 2 (hex) 700+900 $12 700+1100 $13 900+1100 $23 700+1300 $14 900+1300 $24 1100+1300 $34 700+1500 $15 900+1500 $25 1100+1500 $35 1300+1500 $45 700+1700 $16 900+1700 $26 1100+1700 $36 1300+1700 $46 1500+1700 $56 5.1.9 ccitt ?r2? signaling tones forward mode (hz) field 3 (hex) backward mode (hz) field 3 (hex) off $00 off $00 1380+1500 $89 1140+1020 $65 1380+1620 $8a 1140+900 $64 1500+1620 $9a 1020+900 $54 1380+1740 $8b 1140+780 $63 1500+1740 $9b 1020+780 $53 1620+1740 $ab 900+780 $43 1380+1860 $8c 1140+660 $62 1500+1860 $9c 1020+660 $52 1620+1860 $ac 900+660 $42 1740+1860 $bc 780+660 $32 1380+1980 $8d 1140+540 $61 1500+1980 $9d 1020+540 $51 1620+1980 $ad 900+540 $41 1740+1980 $bd 780+540 $31 1860+1980 $cd 660+540 $21
isdn ta pots interface 29 cmx625 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480223.001 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. 6 performance specification 6.1 electrical performance 6.1.1 absolute maximum ratings exceeding these maximum ratings can result in damage to the device. min. max. unit supply (v dd - v ss ) -0.3 7.0 v voltage on any pin to v ss -0.3 v dd + 0.3 v current into or out of v dd and v ss pins -50 +50 ma current into or out of any other pin -20 +20 ma d5 package min. max. unit total allowable power dissipation at t amb = 25c 550 mw derating above 25c 9 mw/c above 25c storage temperature -55 +125 c operating temperature -40 +85 c p4 package min. max. unit total allowable power dissipation at t amb = 25c 800 mw derating above 25c 13 mw/c above 25c storage temperature -55 +125 c operating temperature -40 +85 c 6.1.2 operating limits correct operation of the device outside these limits is not implied. notes min. max. unit supply (v dd - v ss ) 2.7 5.5 v operating temperature -40 +85 c
isdn ta pots interface 30 cmx625 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480223.001 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. 6.1.3 operating characteristics for the following conditions unless otherwise specified: v dd = 2.7v at t amb = 25c and v dd = 3.0v to 5.5v at t amb = -40 to +85c, 0dbm = 775mv rms = 0dbm0. notes min. typ. max. unit dc parameters i dd all enabled, v dd = 5.0v 1 5.5 ma all disabled, v dd = 5.0v 1 300 a dtmf rx only, v dd = 5.0v 1 2.0 ma tx (tones, spm) only, v dd = 5.0v 1 3.5 ma tx output buffer only enabled, v dd = 5.0v 1 1.8 ma pcm codec only, v dd = 5.0v 1 2.0 ma all enabled, v dd = 3.3v 1 3.6 ma all disabled, v dd = 3.3v 1 198 a dtmf rx only, v dd = 3.3v 1 1.3 ma tx (tones, spm) only, v dd = 3.3v 1 2.3 ma tx output buffer only enabled, v dd = 3.3v 1 1.2 ma pcm codec only, v dd = 3.3v 1 1.3 ma logic ?1? input level 3 70% v dd logic ?0? input level 3 30% v dd logic input leakage current (v in = 0 to v dd ), 3 -1.0 +1.0 a output logic ?1? level (i oh = 360a) v dd -0.4 v output logic ?0? level (i ol = 360a) 0.4 v irq output ?off state current (v out = v dd ) 1.0 a fsk encoder and tx uart level at tonefsk pin 4 -1.0 0 1.0 dbm twist (mark level with respect to space level) -2.0 0 +2.0 db tx 1200bits/sec (v.23 mode) baud rate (set by uart and dcl) 1194 1200 1206 baud mark (logical 1) frequency 1297 1300 1303 hz space (logical 0) frequency 2097 2100 2103 hz tx 1200bits/sec (bell 202 mode) baud rate (set by uart and dcl) 1194 1200 1206 baud mark (logical 1) frequency 1197 1200 1203 hz space (logical 0) frequency 2197 2200 2203 hz tonefsk signal level level at tonefsk pin for: single tone 4 -1.0 0 1.0 dbm dual tone (per tone) 4 -4.0 -3.0 -2.0 dbm dtmf high frequency group 4 -4.0 -3.0 -2.0 dbm dtmf low frequency group 4 -6.0 -5.0 -4.0 dbm output impedance 10.0 k ? tone frequency resolution -2.5 2.5 hz tone output distortion 5 0.8 %
isdn ta pots interface 31 cmx625 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480223.001 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. notes min. typ. max. unit dtmf decoder valid input signal levels (each tone of composite signal) 4 -27.0 0 dbm not decode level (either tone of composite signal) 4 -40.0 dbm twist = high tone/low tone -9.0 10.0 db frequency detect bandwidth 1.8 4.5 % dial tone tolerance 6 0 db noise tolerance 6,7 -14 db tone response time 2 40.0 ms tone de-response time 2 45.0 ms tone burst detected 2 40.0 ms tone burst ignored 2 20.0 ms pause length detected 2 40.0 ms pause length ignored 2 20.0 ms spm signal level level at spm pin 4, 8 -1.5 0 1.0 dbm level at spm pin (over the range v dd = 3.3v to 5.5v at t amb = 25 c) 4, 8, 9 -1.0 0 0.5 db tone frequency accuracy -14.0 14.0 hz tone output distortion 5 1.2 % output impedance 10.0 k ? pcm codec-filter pcm codec-filter passband 300 3400 hz passband gain (at 1khz) 0 db passband ripple (with respect to gain at 1khz) -0.5 +0.5 db stopband attenuation 30.0 db group delay absolute 600 s relative to 1khz: 500hz 1.5 ms 600hz 0.75 ms 2600hz 0.25 ms 2800hz 1.5 ms signal-to-total distortion ratio as a function of input level (1khz input level): -45dbm 10 22.0 dbp -40dbm 10 27.0 dbp -30dbm 10 33.0 dbp 0dbm 10 33.0 dbp variation of gain with input level (1khz input signal) -55dbm0 -3.0 +3.0 db -50dbm0 -1.0 +1.0 db -40dbm0 -0.5 +0.5 db +3dbm0 -0.5 +0.5 db idle channel noise 10 -65.0 dbm0p
isdn ta pots interface 32 cmx625 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480223.001 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. notes min. typ. max. unit output impedance tba ? tx output buffer buffer output signal swing; (load greater than 500 ? ) 11 2.2 - - v p-p power-up timing device reset to reliable signal at txout, txout , ring, spm or tonefsk output pins - 50.0 ms notes: 1. at 25 c, not including any current drawn from the cmx625 pins by external circuitry. 2. at nominal signal frequencies and without skew. 3. excluding iom-2 serial bus interface pins: fsc, dcl, dd and du in bus reversal. 4. at v dd = 5.0v, load resistance greater than 40k ? , signal levels are proportional to v dd . 5. frequency above 300hz. 6. referenced to dtmf tone of lower amplitude. 7. bandwidth limited: 0 to 3.4khz gaussian noise. 8. spm has a soft rise and fall time of about 4ms. the level changes between v bias and 0dbm in 2db steps, 16 steps per rise and fall. when spm is disabled, an extra 4ms falling tail end of signal should be taken into consideration. 9. over the range v dd = 3.3v to 5.5v at t amb = 25c. 10. represents a psophometrically weighted measurement. 11. for each of the txout (if enabled) and txout pins, load placed between the pin and v dd /2, for v dd = 5.0v only.
isdn ta pots interface 33 cmx625 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480223.001 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. 6.1.4 timing iom-2 bus timing (see figure 13) notes min. typ. max. unit t dcl dcl clock period in te mode 1 651 ns t dcl dcl clock period in non-te mode 1 244 ns t r / t f dcl clock rise time / fall time 1 - 60 ns fsc fsc period 1 125 s t fscs fsc set-up time 1 70 ns t fsch fsc hold time 1 40 ns t dudc du delay clock (data out) 2 100 ns t dudf du delay frame (data out) 2 150 ns notes: 1. these signals are requirements and are not under control of cmx625. 2. condition c l = 150pf. dcl fsc du (data out) dd (data in) bit 0 1st bit t f t r t dcl t fscs t fsch t dudf t dudc figure 13: iom-2 bus timing diagram
isdn ta pots interface 34 cmx625 advance information 2001 mx-com, inc. www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054 doc. # 20480223.001 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective comp anies. 6.2 packaging figure 14: 24-pin ssop (d5) mechanical outline: order as part no. cmx625d5 figure 15: 24-pin pdip (p4) mechanical outline : order as part no. CMX625P4

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